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[原创] NXP LS1021A时间敏感网络(TSN)参考设计

关键词:ARM CortexR-A7 MCU SoC 物联网(IoT) 智能家庭 智能城市 消费类电子

时间:2017-03-30 14:31:01       作者:NXP       来源:中电网

摘要:NXP公司的LS1021A是成本效益节能的高度集成系统级芯片(SoC),采用32位ARMCortexR-A7核,以及具有ECC保护L1和L2缓冲存储器,运营频率高达1GHz,CoreMarkR性能高达5000,主要用在网络和无线接入点,工业网关,工业自动化,打印,图像,企业和消费类M2M,网络和路由器以及智能无流.本文介绍了LS1021A主要特性,框图,物联网(IoT)智能连接解决方案以及LS1021A时间敏感网络(TSN)参考设计主要特性和电路图.

A member of the Layerscape (LS1) series, the LS102xA family is a cost-effective,

power-efficient, and highly integrated system-on-chip (SoC) design that extends the

reach of the NXP value-performance line of QorIQ communications processors.

Featuring a pair of extremely power-efficient 32-bit ARMR CortexR-A7 cores with

ECC-protected L1 and L2 cache memories for high reliability, running up to 1 GHz, and

providing pre-silicon CoreMarkR performance of over 5,000, the LS102xA family

delivers greater performance than any previous sub-4W communication processor.

This chip can be used for networking and wireless access points, industrial gateways,

industrial automation, printing, imaging, and M2M for enterprise and consumer

networking and router applications.

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