NXP i.MX RT500双核ARM MCU嵌入应用开发方案

NXP公司的i.MX RT500是嵌入应用的双核微控制器(MCU),包括Arm Cortex-M33 CPU和CadenceRXtensaR Fusion F1音频数字信号处理器CPU. Cortex-M33 CPU包括两个硬件协处理器,提供增强性能,用于一系列复杂算法和带有LCD接口和MIPI DSI PHY的2D失量GPU.该系列具有丰富的外设和非常低的功耗.器件有多达5MB SRAM,两个FlexSPIs (Octal/Quad SPI 接口),每个有32KB缓存,以及一个动态加密,高速USB器件/主+PHY,12位1MSps ADC,模拟比较器,支持8 DMIC通路的音频子系统,2D GPU和LCD控制器以及MIPI DSI PHY, SDIO/eMMC; FlexIO; AES/SHA/Crypto M33协处理器和PUF键发生器.控制处理器Arm Cortex-M33工作频率高达200MHz,并内置了嵌套中断向量控制器(NVIC),主外接电源1.8V ± 5%, Vddcore电源从0.6V到1.1V可调,模拟电源1.71-3.6 V,五个VDDIO电源为1.71 - 3.6 V,USB电源为3.0-3.6 V.主要用在工业领域,智能可穿戴市场以及,智能家庭,物联网(IOT)和玩具与棋类游戏.本文介绍了i.MX RT500主要特性,框图和评估板i.MX RT500 EVK (MIMXRT595-EVK) 技术和功能指标以及电路图.

The i.MX RT500 is a family of dual-core microcontrollers forembedded applications featuring an Arm Cortex-M33 CPUcombined with a CadenceRXtensaR Fusion F1 Audio DigitalSignal Processor CPU. The Cortex-M33 includes two hardwarecoprocessors providing enhanced performance for an array ofcomplex algorithms along with a 2D Vector GPU with LCDInterface and MIPI DSI PHY. The family offers a rich set ofperipherals and very low power consumption. The device has upto 5 MB SRAM, two FlexSPIs (Octal/Quad SPI Interfaces) eachwith 32 KB cache, one with dynamic decryption, high-speed USBdevice/host + PHY, 12-bit 1 MS/s ADC, Analog Comparator,

Audio subsystems supporting up to 8 DMIC channels, 2D GPUand LCD Controller with MIPI DSI PHY, SDIO/eMMC; FlexIO;AES/SHA/Crypto M33 coprocessor and PUF key generation

i.MX RT500主要特性:

Control processor core

• Arm Cortex-M33 processor, running at frequencies ofup to 200 MHz

• Arm TrustZone

• Arm Cortex...