MicrosemiDS0142IEEE 1588定时同步模块解决方案

Microsemi公司的DS0142是IEEE 1588定时同步模块,提供高性能时钟同步功能,以满足频率精度,电信频率掩码和相位与时间对准要求,满足ITU-T分组时钟规格或分组时钟规范草案,如ITU-T G.8261 Appendix VI和ITU-T G.8263 PEC-S等,以及ITU-T G.8273.4 T-BC-P(草案)等,主要用在移动基础设备如GSM, WCDMA, TD-SCDMA, LTE和LTE-A,企业基础设备,工业以太互联网,国防和智能能源.本文介绍了DS0142主要特性和框图,应用架构图和软件架构图,以及定时同步模块电路图.
The IEEE 1588 timing synchronization module provides high-performance clock synchronization capableof meeting frequency accuracy, telecom frequency masks, and phase and time alignment requirementsfor the telecom industry, including mobile backhaul for GSM, WCDMA and LTE applications. The timingsynchronization module meets performance requirements of ITU-T packet clock specifications, or draftpacket clock specifications, including:
• ITU-T G.8261 Appendix VI
• ITU-T G.8263 PEC-S
• ITU-T G.8273.2 T-BC
• ITU-T G.8273.2 T-TSC
• ITU-T G.8273.4 T-BC-P (draft)
• ITU-T G.8273.4 T-TSC-A (draft)
• ITU-T G.8273.4 T-TSC-P (draft
The timing synchronization module is suitable for use in a wide variety of markets and applications,including the following IEEE 1588-2008 Profiles:
• Annex J.3 Delay Request-Response Default Profile
• Annex J.4 Peer-to-Peer Default Profile
• ITU-T G.8265.1 Telecom Profile for Frequency Synchronization
• ITU-T G.8275.1 Telecom Profile for Phase with Full Timing Support Networks
• ITU-T G.8275.2 Telecom Profile for Phase with Partial Timing Support Networks
The timing synchronization module is controlled by a very simple CLI interface over a UART serialinterface or ethernet port.
The timing synchronization module has inter-operable interfaces to a motherboard:
• Two UART serial ports: One for host control, one for NMEA-0183
• One ethernet SGMII port: For traffic and host control
• Seven clock inputs<...