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ADI公司的AD5767是16路12位电压输出denseDAC数模转换器(DAC), 采用外部2.5 V 基准电压产生输出电压,集成了输出缓冲器,后者具有20 mA的吸电流或源电流能力.结合这些缓冲器,通过专用扰动引脚可以将低频信号叠加在各DAC输出上.采用多功能四线式串行接口,写入模式下能够以最高50 MHz 的时钟速率工作,并与串行外设接口(SPI),QSPI™, MICROWIRE™和DSP 接口标准兼容.主要用在Mach Zehnder调制器偏置控制,光学模块,偏置控制和模
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ADI公司的AD5767是16路12位电压输出denseDAC数模转换器(DAC), 采用外部2.5 V 基准电压产生输出电压,集成了输出缓冲器,后者具有20 mA的吸电流或源电流能力.结合这些缓冲器,通过专用扰动引脚可以将低频信号叠加在各DAC输出上.采用多功能四线式串行接口,写入模式下能够以最高50 MHz 的时钟速率工作,并与串行外设接口(SPI),QSPI™, MICROWIRE™和DSP 接口标准兼容.主要用在Mach Zehnder调制器偏置控制,光学模块,偏置控制和模拟输出模块.本文介绍了AD5767主要特性,功能框图,以及评估板EVAL-AD5767SD2Z主要特,电路图,材料清单和PCB设计图.
The DAC generates output voltage ranges from an external 2.5 V reference. Depending on the voltage range selected, the midpoint of the output span can be adjusted, allowing a minimum output voltage as low as −20 V or a maximum output voltage of up to +14 V. Each of the 16 channels can be monitored with an integrated output multiplexer.
The AD5767 has integrated output buffers that can sink or source up to 20 mA. In conjunction with these buffers, a low frequency signal can be superimposed onto each DAC output via dedicated dither pins. These dedicated dither pins simplify the system design by reducing the number of external components required for a similar external implementation, like operational amplifiers or resistors. The reduction of external components makes the AD5767 suitable for indium phosphide Mach Zehnder modulator (InP MZM) biasing applications.
The device incorporates a power-on reset (POR) circuit that ensures that the DAC outputs are clamped to GND on power up and remain at this level until the output range of the DAC is configured. The outputs of all DACs are updated through register configuration, with the added functionality of user-selectable DAC channels to be simultaneously updated.
The AD5767 utilizes a versatile 4-wire serial interface that operates at clock rates of up to 50 MHz for write mode and is compatible with serial peripheral interface (SPI), QSPI™, MICROWIRE™, and DSP interface standards. The AD5767 ...
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