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[原创] Cypress PSoC 4200M马达控制方案

关键词:工业控制 马达控制 ARM Cortex-M0 MCU PSoC

时间:2019-09-16 13:23:43       来源:中电网

cypress公司的PSoC 4200M是可升级和可配置的平台架构,是具有ARM® Cortex™-M0 CPU的可编程嵌入系统控制器,组合了不得可编程和可配置模拟于数字区块以及灵活的自动布线.基于本平台架构,PSoC 4200M组合了MCU和数字可编逻辑,可编模拟,可编互连,高性能模拟数字转换器,带比较器模式的运算放大器,以及标准通信和计时外设.32位MCU子系统采用48MHz单周期乘法器的ARM Cortex-M0 CPU,集成带读加速器的多达128KB的闪存,多达16KB SRAM,以及DMA引擎可编模拟,四个可工作在非常低电流深度睡眠模式的运放,所有运放可配置大电流引脚驱动,宽带宽内部驱动,ADC输入缓冲,以及具有灵活连接的比较器模式,允许输入连接到任何引脚,有四个电流DAC(IDAC)用于任何引脚的通用或容性检测应用,以及两个工作在深度睡眠模式的低功耗比较器,12位SAR ADC有1Msps转换速率,以及四个可编程逻辑区块,每个有8 Macrocell和8位数据通路(称作通用数字区块或UDB).工作温度–40℃ 到 +105℃.主要用在永磁同步马达(PMSM),步进马达以及无刷直流马达(BLDC).本文介绍了PSoC 4200M主要特性,框图,马达控制评估板CY8CKIT-037主要特性,硬件框图,多种代码应用框图,以及评估板电路图,材料清单和PCB设计图.

PSoC® 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with anARM® Cortex™-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing.

Based on this platform architecture, PSoC 4200M is a combination of a microcontroller with digital programmable logic, programmableanalog, programmable interconnect, high-performance analog-to-digital conversion, opamps with comparator mode, and standardcommunication and timing peripherals. The PSoC 4200M products will be fully compatible with members of the PSoC 4 platform fornew applications and design needs. The programmable analog and digital subsystems allow flexibility and in-field tuning of the design.

The PSoC 4200M devices include extensive support forprogramming, testing, debugging, and tracing both hardwareand firmware.The ARM Serial_Wire Debug (SWD) interface supports allprogramming and debug features of the device.

Complete debug-on-chip functionality enables full-devicedebugging in the final system using the standard productiondevice. It does not require special interfaces, debugging pods,simulators, or emulators. Only the standard programmingconnections are required to fully support debug.

The PSoC Creator Integrated Development Environment (IDE)provides fully integrated programming and debug support forPSoC 4200M devices. The SWD interface is fully compatiblewith industry-standard third-party tools. PSoC 4200M provides alevel of security not possible with multi-chip application solutionsor with microcontrollers. This is due to its ability to disable debugfeatures, robust flash protection, and because it allows customer-proprietary functionality to be implemented in on-chipprogrammable blocks.

The debug circuits are enabled by default and can only bedisabled in firmware. If not enabled, the only way to re-enablethem is to erase the entire device, clear flash protection, andreprogram the device with new firmware that enables debugging.

Additionally, all device interfaces can be permanently disabled(device security) for applications concerned about phishingattacks due to a maliciously reprogrammed device or attempts todefeat security by starting and interrupting flash programmingsequences. Because all programming, debug, and test interfacesare disabled when maximum device security is enabled,PSoC 4200M with device security enabled may not be returnedfor failure analysis. This is a trade-off the PSoC 4200M allowsthe customer to make.

PSoC 4200M主要特性:

32-bit MCU Subsystem
■ 48 MHz ARM Cortex-M0 CPU with single-cycle multiply
■ Up to 128 kB of flash with Read Accelerator
■ Up to 16 kB of SRAM
■ DMA engineProgrammable Analog
■ Fouropamps that operate in Deep Sleep mode at very lowcurrent levels
■ Allopamps have reconfigurable high current pin-drive,high-bandwidth internal drive, ADC input buffering, andComparator modes with flexible connectivity allowing inputconnections to any pin
■ Four current DACs (IDACs) for general-purpose or capacitivesensing applications on any pin
■ Two low-power comparators that operate in Deep Sleep mode
■ 12-bit SAR ADC with 1-Msps conversion rateProgrammable Digital
■ Four programmable logic blocks, each with 8 Macrocells andan 8-bit data path (called universal digital blocks or UDBs)
■ Cypress-provided peripheral component library, user-definedstate machines, and Verilog inputLow Power 1.71 to 5.5 V Operation
■ 20-nA Stop Mode with GPIO pin wakeup
■ Hibernate and Deep Sleep modes allow wakeup-time versuspower trade-offsCapacitive Sensing
■ Cypress Capacitive Sigma-Delta (CSD) technique providesbest-in-class SNR (>5:1) and water tolerance
■ Cypress-supplied software component makes capacitivesensing design easy
■ Automatic hardware tuning (SmartSense™)Segment LCD Drive
■ LCD drive supported on all pins (common or segment)
■ Operates in Deep Sleep mode with 4 bits per pin memorySerial Communication
■ Four independent run-time reconfigurable serial communicationblocks (SCBs) with reconfigurable I2C, SPI, or UARTfunctionality
■ Two independent CAN blocks for industrial and automotivenetworkingTiming and Pulse-Width Modulation
■ Eight 16-bit timer/counter pulse-width modulator (TCPWM)blocks
■ Center-aligned, Edge, and Pseudo-random modes
■ Comparator-based triggering of Kill signals for motor drive andother high-reliability digital logic applicationsPackage Options
■ 68-pin QFN, 64-pin TQFP wide and narrow pitch, and 48-pinand 44-pin TQFP packages
■ Up to 55 programmable GPIOs
■ GPIO pins can be CapSense, LCD, analog, or digital
■ Drive modes, strengths, and slew rates are programmableExtended Industrial Temperature Operation
■ –40℃to +105℃ operationPSoC Creator Design Environment
■ Integrated Development Environment (IDE) providesschematic design entry and build (with analog and digitalautomatic routing)
■ Applications Programming Interface (API component) for allfixed-function and programmable peripheralsIndustry-Standard Tool Compatibility
■ After schematic entry, development can be done withARM-based industry-standard development tools

图1.PSoC 4200M框图

马达控制评估板CY8CKIT-037

Thanks for your interest in the CY8CKIT-037 PSoC® 4 Motor Control Evaluation Kit (EVK). This kit enables engineers to evaluate Cypress’ PSoC 4 family of devices for motor control applications. Based on this kit, customers can create control solutions for three major motor types: Permanent Magnet Synchronous Motor (PMSM), stepper, and Brushless DC (BLDC).

The Cypress PSoC family of devices integrates abundant internal resources for motor control applications, such as Timer Counter Pulse Width Modulator (TCPWM), SAR ADC, comparators, opamps, and universal digital blocks (UDBs). In addition, an Arm® Cortex® core enables high-performance motor control solutions on PSoC devices. Headers provided on the EVK board allow you to connect it to the CY8CKIT-042 PSoC 4 Pioneer Kit board to create a complete motor control system.

This kit guide provides the circuit structure of the Motor Control EVK board and explains how to configure it to create a solution for different motor types. It provides five code examples that cover sensored and sensorless BLDC control, PMSM sensorless field-oriented control (FOC), and stepper motor microstepping control. It also introduces the Bridge Control Panel (BCP) as a debugging tool in the motor control development process.

马达控制评估板CY8CKIT-037包括:

• CY8CKIT-037 Motor Control Evaluation Board
• 24-V/2.1-A AC-DC Adapter
• BLDC motor (BLY172S-24V-4000) with sinusoidal back electromotive force
• USB Standard-A to Mini-B cable
• Configuration Jumpers
• Fuse
• Screwdriver
• Quick Start Guide
CY8CKIT-037 Evaluation Kit
The motor control system can be separated into two parts: the driver board and the controller board. The CY8CKIT-037 Motor Control EVK is the driver board, which contains the DC/DC power circuit, dual H-bridge circuit, motor current and bus voltage sampling and processing circuit, protection circuit, user configuration circuit, and connectors to the controller board. The controller board receives the signals, implements the proper algorithm to process them, and then generates control signals to the driver board to run the motor. Figure 3-1 shows the EVK board and its general description. CY8CKIT-037 EVK is the driver board; the CY8CKIT-042 kit works as the controller board. They are interfaced with Arduino-compatible connectors.

图2.马达控制评估板CY8CKIT-037外形和概述图

图3.马达控制评估板CY8CKIT-037硬件框图

图4.CY8CKIT-037 EVK插入CY8CKIT-042 Pioneer板连接图

图5.马达和电源连接图

图6.无传感器BLDC马达控制代码样板框图

图7.单并联无传感器FOC马达控制代码样板框图

图8.步进马达控制代码样板框图

图9.马达控制评估板CY8CKIT-037框图

图10.马达控制评估板CY8CKIT-037电路图(1)

图11.马达控制评估板CY8CKIT-037电路图(2)

图12.马达控制评估板CY8CKIT-037电路图(3)

图13.马达控制评估板CY8CKIT-037电路图(4)

图14.马达控制评估板CY8CKIT-037电路图(5)

图15.马达控制评估板CY8CKIT-037电路图(6)
马达控制评估板CY8CKIT-037材料清单:




无负载元件表:



图16.马达控制评估板CY8CKIT-037 PCB设计图(顶层)

图17.马达控制评估板CY8CKIT-037 PCB设计图(底层)

图18.马达控制评估板CY8CKIT-037 PCB设计图(1)

图19.马达控制评估板CY8CKIT-037 PCB设计图(2)

图20.马达控制评估板CY8CKIT-037 PCB设计图(3)

图21.马达控制评估板CY8CKIT-037 PCB设计图(4)
详情请见:
https://www.cypress.com/file/377971/download
https://www.cypress.com/file/141156/download
以及https://www.cypress.com/file/458026/download
CY8CKIT-037 MOTOR CONTROL EVK Schematic.pdf
001-93963_PSoC_4_PSoC_4200M_Family_Datasheet_Programmable_System-on-Chip_PSoC.pdf
CY8CKIT-037 Board Design Files.zip
3554115-001-92562.pdf

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