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[原创] NXP S32K144 32位ARM MCU汽车电子应用方案

关键词:ARM Cortex-M0+/M4F MCU 汽车电子 S32K144

时间:2018-09-13 11:10:32       作者:NXP       来源:中电网

NXP公司的S32K144是应用汽车工业的32位ARM ®Cortex®-M0+/M4F MCU高度可升级的KEA系列产品,工作电压2.7V-5.5V,提供广泛的存储器,外设和封装选择,满足AEC-Q100规范,支持112MHz频率(HSRUN模式),性能1.25 Dhrystone MIPS per MHz,集成了数字信号处理器(DSP),可配置嵌套中断向量控制器(NVIC)和单精度浮点单元(FPU).本文介绍了S32K144主要特性,系列架构图和评估板S32K144EVB主要特性和电路图.

The S32K1xx Product Series further extends the highlyscalable portfolio of ARM ®Cortex ® -M0+/M4F MCUs in theautomotive industry. It builds on the legacy of the KEA series,whilst introducing higher memory options alongside a richerperipheral set extending capability into a variety of automotiveapplications. With a 2.7 –5.5 V supply and focus on automotive environment robustness, the S32K series devicesare well suited to a wide range of applications in electricalharsh environments, and are optimized for cost-sensitive applications offering low pin-count options. The S32K seriesoffers a broad range of memory, peripherals, and packageoptions. They share common peripherals and pin countsallowing developers to migrate easily within an MCU familyor among the MCU families to take advantage of morememory or feature integration. This scalability allows developers to standardize on the S32K series for their endproduct platforms, maximizing hardware and software reuse,and reducing time-to-market.

S32K is a scalable family of AEC-Q100 qualified 32-bit Arm® Cortex®-M4F and Cortex-M0+ based MCUs targeted for general purpose automotive and high-reliability industrial applications.

Scalability – hardware and software compatible families with multiple performance, memory and feature options Integration–ISO CAN FD, CSEc hardware security, ASIL-B ISO26262 functional safety,ultra-low power performance Software Free automotive-grade Software Development Kit (SDK) and S32 Design Studio IDE AUTOSAR and MCAL Support, third-party ecosystem .

S32K144主要特性:

• Operating characteristics
– Voltage range: 2.7 V to 5.5 V
– Ambient temperature range: -40℃ to 105℃ forHSRUN mode, -40℃ to 125℃ for RUN mode
• Arm™ Cortex-M4F/M0+ core, 32-bit CPU
– Supports up to 112 MHz frequency (HSRUN mode)with 1.25 Dhrystone MIPS per MHz
– Arm Core based on the Armv7 Architecture andThumb?-2 ISA
– Integrated Digital Signal Processor (DSP)
– Configurable Nested Vectored Interrupt Controller(NVIC)
– Single Precision Floating Point Unit (FPU)
• Clock interfaces
– 4 - 40 MHz fast external oscillator (SOSC)
– 48 MHz Fast Internal RC oscillator (FIRC)
– 8 MHz Slow Internal RC oscillator (SIRC)
– 128 kHz Low Power Oscillator (LPO)
– Up to 112 MHz (HSRUN) System Phased LockLoop (SPLL)
– Up to 50 MHz DC external square wave input clock
– Real Time Counter (RTC)
• Power management
– Low-power Arm Cortex-M4F/M0+ core withexcellent energy efficiency
– Power Management Controller (PMC) with multiplepower modes: HSRUN, RUN, STOP, VLPR, andVLPS. Note: CSEc (Security) or EEPROM writes/erase will trigger error flags in HSRUN mode (112MHz) because this use case is not allowed toexecute simultaneously. The device will need toswitch to RUN mode (80 Mhz) to execute CSEc(Security) or EEPROM writes/erase.
– Clock gating and low power operation supported onspecific peripherals.
• Memory and memory interfaces
– Up to 2 MB program flash memory with ECC
– 64 KB FlexNVM for data flash memory with ECCand EEPROM emulation.
Note: CSEc (Security) orEEPROM writes/erase will trigger error flags inHSRUN mode (112 MHz) because this use case isnot allowed to execute simultaneously. The device
will need to switch to RUN mode (80 MHz) toexecute CSEc (Security) or EEPROM writes/erase.
– Up to 256 KB SRAM with ECC
– Up to 4 KB of FlexRAM for use as SRAM orEEPROM emulation
– Up to 4 KB Code cache to minimize performanceimpact of memory access latencies
– QuadSPI with HyperBus™ support
• Mixed-signal analog
– Up to two 12-bit Analog-to-Digital Converter(ADC) with up to 32 channel analog inputs permodule
– One Analog Comparator (CMP) with internal 8-bitDigital to Analog Converter (DAC)
• Debug functionality
– Serial Wire JTAG Debug Port (SWJ-DP) combines
– Debug Watchpoint and Trace (DWT)
– Instrumentation Trace Macrocell (ITM)
– Test Port Interface Unit (TPIU)
– Flash Patch and Breakpoint (FPB) Unit
• Human-machine interface (HMI)
– Up to 156 GPIO pins with interrupt functionality
– Non-Maskable Interrupt (NMI)
• Communications interfaces
– Up to three Low Power Universal Asynchronous Receiver/Transmitter (LPUART/LIN) modules with DMA supportand low power availability
– Up to three Low Power Serial Peripheral Interface (LPSPI) modules with DMA support and low power availability– Up to two Low Power Inter-Integrated Circuit (LPI2C) modules with DMA support and low power availability
– Up to three FlexCAN modules (with optional CAN-FD support)
– FlexIO module for emulation of communication protocols and peripherals (UART, I2C, SPI, I2S, LIN, PWM, etc).
– Up to one 10/100Mbps Ethernet with IEEE1588 support and two Synchronous Audio Interface (SAI) modules.
• Safety and Security
– Cryptographic Services Engine (CSEc) implements a comprehensive set of cryptographic functions as described in theSHE (Secure Hardware Extension) Functional Specification. Note: CSEc (Security) or EEPROM writes/erase willtrigger error flags in HSRUN mode (112 MHz) because this use case is not allowed to execute simultaneously. Thedevice will need to switch to RUN mode (80 MHz) to execute CSEc (Security) or EEPROM writes/erase.
– 128-bit Unique Identification (ID) number
– Error-Correcting Code (ECC) on flash and SRAM memories
– System Memory Protection Unit (System MPU)
– Cyclic Redundancy Check (CRC) module
– Internal watchdog (WDOG)
– External Watchdog monitor (EWM) module
• Timing and control
– Up to eight independent 16-bit FlexTimers (FTM) modules, offering up to 64 standard channels (IC/OC/PWM)
– One 16-bit Low Power Timer (LPTMR) with flexible wake up control
– Two Programmable Delay Blocks (PDB) with flexible trigger system
– One 32-bit Low Power Interrupt Timer (LPIT) with 4 channels
– 32-bit Real Time Counter (RTC)
• Package
– 32-pin QFN, 48-pin LQFP, 64-pin LQFP, 100-pin LQFP, 100-pin MAPBGA, 144-pin LQFP,176-pin LQFP package options
• 16 channel DMA with up to 63 request sources using DMAMUX

图1.S32K14x系列架构图

评估板S32K144EVB

The S32K144EVB is low-cost evaluation platform and development system for quick application prototyping and demonstration for the S32K144 MCU.

评估板S32K144EVB主要特性:

Small form factor
Arduino™ UNO footprint-compatible with expansion “shield” support
Onboard connectivity for CAN, LIN, UART/SCI
Integrating an SBC (UJA1169) and LIN phy (TJA1027)
Easy access to the MCU I/O header pins for prototyping
Potentiometer, RGB LED, 2x push buttons and 2 touchpads
Integrated open-standard serial and debug adapter (OpenSDA) with support for several industry-standard debug interfaces
Flexible power supply options (micro USB or external 12 V supply)
S32K144EVB Evaluation Board

图2.评估板S32K144EVB外形图

图3.评估板S32K144EVB电路图(1)

图4.评估板S32K144EVB电路图(2)

图5.评估板S32K144EVB电路图(3)

图6.评估板S32K144EVB电路图(4)

图7.评估板S32K144EVB电路图(5)
详情请见:
https://www.nxp.com/docs/en/data-sheet/S32K-DS.pdf
https://www.nxp.com/docs/en/quick-reference-guide/MTRDEVKSPNK144QSG.pdf
以及https://www.nxp.com/docs/en/quick-reference-guide/S32K144EVB-QSG.pdf
https://www.nxp.com/downloads/en/schematics/SCH-29248.pdf
S32K-DS.pdf
MTRDEVKSPNK144QSG.pdf
S32K144EVB-QSG.pdf
SCH-29248.pdf
S32K144EVB-Q100__BOM.xls

 

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