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NS DS90UR241 SERDES方案

关键词:通信技术 时钟发生器 NS

时间:2009-07-16 17:30:00       来源:NS

NS公司的DS90UR241/124芯片组是5-43MHz DC平衡的24位LVDS串行化器/并行化器,具有24:1和1:24的数据传输,具有用户定义的预加重,支持AC耦合的数据传输,嵌入了时钟和数据恢复(CDR),电源电压3.3V ± 10%,具有广泛的用途.本文介绍了DS90UR241/124芯片组的主要特性, 方框图, DS90UR241和DS90UR124的典型应用电路, 典型的SERDES系统方框图以及串行化器(Tx) PCB电路图与并行化器(Rx) PCB电路图.

DS90UR241/DS90UR124 5-43 MHz DC-Balanced 24-Bit LVDS Serializer and
Deserializer
General Description
The DS90UR241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information. This single serial stream simplifies transferring a 24-bit bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. It saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins.

The DS90UR241/124 incorporates LVDS signaling on the high-speed I/O. LVDS provides a low power and low noise environment for reliably transferring data over a serial transmission path. By optimizing the Serializer output edge rate for the operating frequency range EMI is further reduced...

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