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ADI HSC-ADC-EVALCZ基于FPGA的高速ADC评估方案

关键词:通信技术 无线通信;工业控制 数据采集

时间:2012-07-23 10:16:03       作者:ADI       来源:HSC,ADC

ADI公司的HSC-ADC-EVALCZ是采用Xilinx Virtex-4 FPGA的高速ADC评估平台,能从ADI高速ADC评估板中捕获数字数据.平台通过USB端口连接到PC,采用VisualAnalog®快速评估高速ADC的性能,与之配套的有ADI ADC高速评估板,信号源和时钟源.平台具有64 kB FIFO深度, 644 MSPS SDR 和800 MSPS DDR并行输入,支持1.8 V, 2.5 V和3.3 V CMOS与LVDS接口,支持高达18位的多个ADC通路.本文介绍了HSC-ADC-EVALCZ评估平台产品亮点和主要特性,功能框图以及电路图,材料清单与PCB元件布局图.
 
The HSC-ADC-EVALCZ high speed converter evaluation platform uses an FPGA based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-digital converter (ADC) evaluation boards. The board is connected to the PC through a USB port and is used with VisualAnalog® to quickly evaluate the performance of high speed ADCs. The evaluation kit is easy to set up. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source. Once the kit is connected and powered, the evaluation is enabled instantly on the PC.

HSC-ADC-EVALCZ评估平台产品亮点:

1. Easy to Set Up. Connect the included power supply along with the CLK and AIN signal sources to the two evaluation boards. Then connect to the PC via the USB port and evaluate the performance instantly.
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