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[原创] NXP LPC84X系列低成本32位ARM MCU开发方案

关键词:ARMCortex-M0+ MCU 工业控制 马达控制 手持设备和可穿戴 照明

时间:2017-06-26 10:27:15       作者:NXP       来源:中电网

nxp公司的LPC84X系列是低成本基于ARM® Cortex®-M0+核的32位MCU,CPU工作频率高达30MHz,集成了多达64KB闪存和16KB SRAM,FAIM存储器,以及12位ADC,10位DAC和比较器,CRC引擎,四个I2C接口,多达5个USART,两个SPI接口,容性触摸接口,多速率计时器,自叫醒计时器,SCTimer/PWM,通用32位计数/计时器,DMA以及功能可配置的I/O端口等.主要用在传感器网关,马达控制,工业应用,手持设备和可穿戴,照明,游戏控制器,消费类电子,防火和安全应用以及气候控制.本文介绍了LPC84X系列主要特性和优势,框图,以及评估板LPCXpresso845-MAXOM13097主要特性,框图,电路图,材料清单和PCB元件分布图.

The LPC84x are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating at CPU frequencies of up to 30 MHz. The LPC84x support up to 64 KB of flash memory and 16 KB of SRAM.

The peripheral complement of the LPC84x includes a CRC engine, four I2C-bus interfaces, up to five USARTs, up to two SPI interfaces, Capacitive Touch Interface, one multi-rate timer, self-wake-up timer, SCTimer/PWM, one general purpose 32-bit counter/timer, a DMA, one 12-bit ADC, two 10-bit DACs, one analog comparator, function-configurable I/O ports through a switch matrix, an input pattern match engine, and up to 54 general-purpose I/O pins.

LPC84X系列主要特性和优势:

 System:
 ARM Cortex-M0+ processor (revision r0p1), running at frequencies of up to30 MHz with single-cycle multiplier and fast single-cycle I/O port.
 ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).
 System tick timer.
 AHB multilayer matrix.
 Serial Wire Debug (SWD) with four break points and two watch points. JTAG
boundary scan (BSDL) supported.
 Micro Trace Buffer (MTB).
 Memory:
 Up to 64 KB on-chip flash programming memory with 64 Byte page write anderase.
 Fast Initialization Memory (FAIM) allowing the user to configure chip behavior onpower-up.
 Code Read Protection (CRP)
 Up to 16 KB SRAM consisting of two 8 KB contiguous SRAM banks. One 8 KB of
SRAM can be used for MTB.
 Bit-band addressing supported to permit atomic operations to modify a single bit.
 ROM API support:
 Boot loader.
 Supports Flash In-Application Programming (IAP).
 Supports In-System Programming (ISP) through USART, SPI, and I2C.
 FAIM API.
 FRO API.
 On-chip ROM APIs for integer divide.
 Digital peripherals:
 High-speed GPIO interface connected to the ARM Cortex-M0+ I/O bus with up to 54 General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors,programmable open-drain mode, input inverter, and digital filter. GPIO direction control supports independent set/clear/toggle of individual bits.
 High-current source output driver (20 mA) on four pins.
 High-current sink driver (20 mA) on two true open-drain pins.
 GPIO interrupt generation capability with boolean pattern-matching feature on eight
GPIO inputs.
 Switch matrix for flexible configuration of each I/O pin function.
 CRC engine.
 DMA with 25 channels and 13 trigger inputs.
 Capacitive Touch Interface.
 Timers:
 One SCTimer/PWM with five input and seven output functions (including capture and match) for timing and PWM applications. Inputs and outputs can be routed to or from external pins and internally to or from selected peripherals. Internally, the SCTimer/PWM supports 8 match/captures, 8 events, and 8 states.
 One 32-bit general purpose counter/timer, with four match outputs and three capture inputs. Supports PWM mode, external count, and DMA.
 Four channel Multi-Rate Timer (MRT) for repetitive interrupt generation at up to four programmable, fixed rates.
 Self-Wake-up Timer (WKT) clocked from either Free Running Oscillator (FRO), a low-power, low-frequency internal oscillator, or an external clock input in the always-on power domain.
 Windowed Watchdog timer (WWDT).
 Analog peripherals:
 One 12-bit ADC with up to 12 input channels with multiple internal and external trigger inputs and with sample rates of up to 1.2 Msamples/s. The ADC supports two independent conversion sequences.
 Comparator with five input pins and external or internal reference voltage.
 Two 10-bit DACs.
 Serial peripherals:
 Five USART interfaces with pin functions assigned through the switch matrix and two fractional baud rate generators.
 Two SPI controllers with pin functions assigned through the switch matrix.
 Four I2C-bus interfaces. One I2C supports Fast-mode Plus with 1 Mbit/s data rates on two true open-drain pins and listen mode. Three I2Cs support data rates up to 400 kbit/s on standard digital pins.
 Clock generation:
 Free Running Oscillator (FRO). This oscillator provides a selectable 18 MHz, 24 MHz, and 30 MHz outputs that can be used as a system clock. Also, these outputs can be divided down to 1.125 MHz, 1.5 MHz, 1.875 MHz, 9 MHz, 12 MHz, and 15 MHz for system clock. The FRO is trimmed to +/- 1 % accuracy over the entire voltage and temperature range of 0 C to 70 C.
 Low power boot at 1.5 MHz using FAIM memory.
 External clock input for clock frequencies of up to 25 MHz.
 Crystal oscillator with an operating range of 1 MHz to 25 MHz.
 Low power oscillator can be used as a clock source to the watchdog timer.
 Programmable watchdog oscillator with a frequency range of 9.4 kHz to 2.3 MHz.
 PLL allows CPU operation up to the maximum CPU rate without the need for a
high-frequency crystal. May be run from the system oscillator, the external clock input, or the internal FRO.
 Clock output function with divider that can reflect all internal clock sources.
 Power control:
 Reduced power modes: sleep mode, deep-sleep mode, power-down mode, and
deep power-down mode.
 Wake-up from deep-sleep and power-down modes on activity on USART, SPI, and I2C peripherals.
 Timer-controlled self wake-up from deep power-down mode.
 Power-On Reset (POR).
 Brownout detect (BOD).
 Unique device serial number for identification.
 Single power supply (1.8 V to 3.6 V).
 Operating temperature range -40 °C to +105 °C.
 Available in LQFP64, LQFP48, HVQFN48, and HVQFN33 packages.

LPC84X系列应用:

 Sensor gateways 
Simple motor control
 Industrial
 Portables and wearables
 Gaming controllers
 Lighting
 8/16-bit applications
 Motor control
 Consumer
 Fire and security applications
 Climate control

图1.LPC84X系列框图

LPC84X系列评估板LPCXpresso845-MAXOM13097

The LPCXpresso-MAX family of boards provides a powerful and flexible development system for NXP ’ s low-end ARM® Cortex®-M0+ based MCUs. They can be used with a range of development tools, including the MCUXpresso IDE toolchain. The LPCXpresso845-MAX board was created to enable evaluation of and prototyping with the LPC84x family of MCUs.

图2.评估板LPCXpresso845-MAX外形图

评估板LPCXpresso845-MAX主要特性:

Compatible with MCUXpresso IDE and other popular toolchains (incl. IAR and Keil®)
On-board CMSIS-DAP (debug probe) with VCOM port, based on LPC11U35 MCU
Debug connector to allow debug of target MCU using an external probe
Red, green and blue user LEDs
Target ISP and user/wake buttons
Target reset button
LPCXpresso expansion connector
DAC output via speaker driver and speaker
Arduino connectors compatible with the “Arduino UNO” platform
Pmod® compatible expansion header
Prototyping area
Kit Contains
LPCXpresso845-MAX Development Board

图3.评估板LPCXpresso845-MAX框图

图4.评估板LPCXpresso845-MAX电路图(1)

图5.评估板LPCXpresso845-MAX电路图(2)

图6.评估板LPCXpresso845-MAX电路图(3)

图7.评估板LPCXpresso845-MAX PCB丝印图(顶层)
详情请见:
http://www.nxp.com/assets/documents/data/en/data-sheets/LPC84x.pdf
http://www.nxp.com/assets/documents/data/en/user-guides/UM11057.pdf
LPC84x.pdf
UM11057.pdf
LPCXpresso845MAX-Board.zip

 

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