Altera Stratix V GX FPGA开发方案

Altera公司的Stratix V FPGA包括GT, GX, GS和E四个系列,采用28nm技术,集成了高达28.05Gbps的收发器和独特的硬件IP区块,适合不同的应用如包括PCI Express® (PCIe®)Gen3在内的宽带应用,40G/100G和更高的数据应用,高性能高精度的DSP应用.本文介绍了Stratix V FPGA主要特性,Stratix V GT, GX和GS 器件框图以及Altera® Stratix® V GX FPGA开发套件主要特性和元件区块,框图,Stratix V GX FPGA开发板主要元件表,电路图和材料清单,PCB布局图.

Altera’s 28-nm Stratix V FPGAs include innovations such as an enhanced core architecture, integrated transceivers up to 28.05 gigabits per second (Gbps), and a unique array of integrated hard intellectual property (IP) blocks. With these innovations, Stratix V FPGAs deliver a new class of application-targeted devices optimized for:

■ Bandwidth-centric applications and protocols, including PCI Express® (PCIe®)Gen3

■ Data-intensive applications for 40G/100G and beyond

■ High-performance, high-precision digital signal processing (DSP) applications

Stratix V devices are available in four variants (GT, GX, GS, and E), each targeted for a different set of applications. For higher volume production, you can prototype with Stratix V FPGAs and use the low-risk, low-cost path to HardCopy® V ASICs.
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