ADI ADMV4420 K波段下变换器解决方案

 ADI公司的ADMV4420是集成了分数－N PLL和VCO的K波段下变换器,具有高度集成双平衡有源混频器和分数N合成器,其RF前端包括集成的平衡/不平衡变换器(balun)和低噪音放大器(LNA)(7dB单边带噪音),以及高动态范围IF输出放大器,其转换增益36dB.集成的低相位噪音分数N锁相环(PLL)和多核压控振荡器(VCO)和内部2x乘法器,输出P1dB为7 dBm,输出IP3为16 dBm,RF输入频率16.95 GHz 到 22.05 GHz, LO频率范围16.75 GHz to 21.15 GHz, IF频率范围900 MHz 到 2500 MHz ,5V工作电压,主要用在卫星通信和点对点微波通信.本文介绍了ADMV4420主要特性,功能框图以及评估板ADMV4420-EVALZ主要特性,配置图和实验室连接图,电路图,材料清单和PCB设计图.

The ADMV4420 is a highly integrated, double balanced, active mixer with an integrated fractional-N synthesizer, ideally suited for next generation K band satellite communications.

The RF front end consists of an integrated RF balun and low noise amplifier (LNA) for an optimal, 7 dB, single-sideband noise figure while minimizing external components. Additionally, the high dynamic range IF output amplifier provides a nominal conversion gain of 36 dB.

An integrated low phase noise, fractional-N, phase-locked loop (PLL) with a multicore voltage controlled oscillator (VCO) and internal 2× multiplier generate the necessary on-chip LO signal for the double balanced mixer, eliminating the need for external frequency synthesis. The multicore VCO uses an internal autocalibration routine that allows the PLL to select the necessary settings and lock in approximately 400 μs.

The reference input to the PLL employs a differentially excited 50 MHz crystal oscillator. Alternatively, the reference input can be driven by an external, singled-ended, 50 MHz source. The phase frequency detector (PFD) comparison frequency of the PLL operates up to 50 MHz.

The ADMV4420 is fabricated on a silicon germanium (SiGe), bipolar complementary metal-oxide semiconductor (BiCMOS) process, and is available in a 32-lead, RoHS compliant, 5 mm × 5 mm LFCSP package wi...