Altera Stratix V FPGA 100GbE线路卡设计方案

Altera公司的28nm Stratix V FPGA包括增强的核架构,高达28Gbps和低功耗低BER的收发器,以及硬IP区块阵列等. Stratix V FPGA包括四个GT, GX, GS和E系列,内核工作电压0.85V, 533-MHz/1066-Mbps 外接存储器接口, Stratix V GX/GS/E 器件的接口电平为1.2V到3.3V, Stratix V GT 器件的接口电平为1.2V到2.5V, 非常适合用在专注于带宽的应用和协议,40G/100G或更高速率的数据应用以及高性能高精度的DSP应用.本文介绍了Stratix V FPGA系列主要特性,芯片框图以及Stratix V FPGA在100Gb OTN多路收发器, 100GbE线路卡, 纵横制和背板交换, 军用雷, RF卡和通路卡和视频服务器的应用框图以及采用两片Stratix V FPGA的100-GbE线路卡框图.

Altera’s 28-nm Stratix V FPGAs include innovations such as an enhanced core architecture, integrated transceivers up to 28 Gbps, and a unique array of integrated hard intellectual property (IP) blocks. With these innovations, Stratix V FPGAs deliver a new class of application-targeted devices optimized for:

■ Bandwidth-centric applications and protocols

■ Data-intensive applications for 40G/100G and beyond
..

查看全文