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[原创] Microchip PIC18F47Q10 PIC MIC低功耗应用开发方案

关键词:PIC MIC PIC18F27/47Q10微控制器(MCU)

时间:2019-04-23 10:58:37       来源:中电网

microchip公司的PIC18F27/47Q10微控制器(MCU)是28/40/44引脚器件,具有模拟,核独立和通信外设,适用于各种通用和低功耗应用.PIC18F27/47Q10 MCU具有10位ADC和计算(ADC2)自动电容分压器(CVD)技术,用于高档触摸检测,求平均值,滤波,过取样和进行自动阈值比较.此外还提供了一组核独立的外设如互补波形发生器(CWG),视窗看门狗计时器(WWDT),循环冗余校验(CRC)/存储器扫描,零交叉检测(ZCD),可配置逻辑单元(CLC)和外设引脚选择(PPS),增加了设计灵活性和降低系统成本.本文介绍了PIC18F27/47Q10系列的核特性,存储器,工作特性,节能工作模式,数字外设和模拟外设,时钟结构和可编/调试特性以及其框图,时钟源框图以及PIC18F47Q10 Curiosity Nano评估套件主要特性,电路图和引脚映射图.

PIC18F27/47Q10 microcontrollers feature analog, core independent, and communication peripherals fora wide range of general purpose and low-power applications. These 28/40/44-pin devices are equippedwith a 10-bit ADC with Computation (ADC2) automating Capacitive Voltage Divider (CVD) techniques foradvanced touch sensing, averaging, filtering, oversampling and performing automatic thresholdcomparisons. They also offer a set of core independent peripherals such as Complementary WaveformGenerator (CWG), Windowed Watchdog Timer (WWDT), Cyclic Redundancy Check (CRC)/MemoryScan, Zero-Cross Detect (ZCD), Configurable Logic Cell (CLC), and Peripheral Pin Select (PPS),providing increased design flexibility and lower system cost.

PIC18F27/47Q10主要特性:

核特性:
• C Compiler Optimized RISC Architecture
• Operating Speed:
– DC–64 MHz clock input over the full VDD range
– 62.5 ns minimum instruction cycle
• Programmable 2-Level Interrupt Priority
• 31-Level Deep Hardware Stack
• Three 8-Bit Timers (TMR2/4/6) with Hardware Limit Timer (HLT)
• Four 16-Bit Timers (TMR0/1/3/5)
• Low-Current Power-on Reset (POR)
• Power-up Timer (PWRT)
• Brown-out Reset (BOR)
• Low-Power BOR (LPBOR) Option
• Windowed Watchdog Timer (WWDT):
– Watchdog Reset on too long or too short interval between watchdog clear events
– Variable prescaler selection
– Variable window size selection
– All sources configurable in hardware or software
存储器
• Up to 128K Bytes Program Flash Memory
• Up to 3615 Bytes Data SRAM Memory
• Up to 1024 Bytes Data EEPROM
• Programmable Code Protection
• Direct, Indirect and Relative Addressing modes
工作特性
• Operating Voltage Range:
– 1.8V to 5.5V
• Temperature Range:
– Industrial: -40℃ to 85℃
– Extended: -40℃ to 125℃
节能工作模式
• Doze: CPU and Peripherals Running at Different Cycle Rates (typically CPU is lower)
• Idle: CPU Halted While Peripherals Operate
• Sleep: Lowest Power Consumption
• Peripheral Module Disable (PMD):
– Ability to selectively disable hardware module to minimize active power consumption of unusedperipherals
• Extreme Low-Power mode (XLP)
– Sleep: 500 nA typical @ 1.8V
– Sleep and Watchdog Timer: 900 nA typical @ 1.8V
数字外设
• Configurable Logic Cell (CLC):
– Integrated combinational and sequential logic
• Complementary Waveform Generator (CWG):
– Rising and falling edge dead-band control
– Full-bridge, half-bridge, 1-channel drive
– Multiple signal sources
• Capture/Compare/PWM (CCP) modules:
– Two CCPs
– 16-bit resolution for Capture/Compare modes
– 10-bit resolution for PWM mode
• 10-Bit Pulse-Width Modulators (PWM):
– Two 10-bit PWMs
• Serial Communications:
– Two Enhanced USART (EUSART) with Auto-Baud Detect, Auto-wake-up on Start.
RS-232, RS-485, LIN compatible
– SPI
– I2C, SMBus and PMBus™ compatible
• Up to 35 I/O Pins and One Input Pin:
– Individually programmable pull-ups
– Slew rate control
– Interrupt-on-change on all pins
– Input level selection control
• Programmable CRC with Memory Scan:
– Reliable data/program memory monitoring for Fail-Safe operation (e.g., Class B)
– Calculate CRC over any portion of Flash or EEPROM
– High-speed or background operation
• Hardware Limit Timer (TMR2/4/6+HLT):
– Hardware monitoring and Fault detection
• Peripheral Pin Select (PPS):
– Enables pin mapping of digital I/O
• Data Signal Modulator (DSM)
模拟外设
• 10-Bit Analog-to-Digital Converter with Computation (ADC2):
– 35 external channels
– Conversion available during Sleep
– Four internal analog channels
– Internal and external trigger options
– Automated math functions on input signals:
• Averaging, filter calculations, oversampling and threshold comparison
– 8-bit hardware acquisition timer
• Hardware Capacitive Voltage Divider (CVD) Support:
– 8-bit precharge timer
– Adjustable Sample-and-Hold capacitor array
– Guard ring digital output drive
• Zero-Cross Detect (ZCD):
– Detect when AC signal on pin crosses ground
• 5-Bit Digital-to-Analog Converter (DAC):
– Output available externally
– Programmable 5-bit voltage (% of VDD,[VREF+ - VREF-], FVR)
– Internal connections to comparators and ADC
• Two Comparators (CMP):
– Four external inputs
– External output via PPS
• Fixed Voltage Reference (FVR) Module:
– 1.024V, 2.048V and 4.096V output levels
– Two buffered outputs: One for DAC/CMP and one for ADC
时钟结构
• High-Precision Internal Oscillator Block (HFINTOSC):
– Selectable frequencies up to 64 MHz
– ±1% at calibration
• 32 kHz Low-Power Internal Oscillator (LFINTOSC)
• External 32 kHz Crystal Oscillator (SOSC)
• External High-frequency Oscillator Block:
– Three crystal/resonator modes
– Digital Clock Input mode
– 4x PLL with external sources
• Fail-Safe Clock Monitor:
– Allows for safe shutdown if external clock stops
• Oscillator Start-up Timer (OST)
可编/调试特性
• In-Circuit Serial Programming™ (ICSP™) via Two Pins
• In-Circuit Debug (ICD) with Three Breakpoints via Two Pins
• Debug Integrated On-Chip

图1.PIC18F27/47Q10系列框图

图2.PIC18F27/47Q10系列简化PIC MCU时钟源框图

PIC18F47Q10 Curiosity Nano评估套件

The PIC18F47Q10 Curiosity Nano evaluation kit is a hardware platform to evaluate the PIC18F47Q10microcontroller.

Supported by MPLAB® X Integrated Development Environment (IDE), the kit provides easy access to thefeatures of the PIC18F47Q10 and explains how to integrate the device into a custom design.

The Curiosity Nano series of evaluation kits include an on-board debugger, and no external tools arenecessary to program the PIC18F47Q10.

The Microchip PIC18F47Q10 Curiosity Nano evaluation kit is a hardware platform to evaluate thePIC18F47Q10 microcontroller.

PIC18F47Q10 Curiosity Nano评估套件主要特性:

• PIC18F47Q10-I/MP Microcontroller
• One Yellow User LED
• One Mechanical User Switch
• On-Board Debugger
– Board identification in MPLAB® X
– One green power and status LED
– Programming and debugging
– Virtual COM port (CDC)
– One logic analyzer channel (DGI GPIO)
• USB Powered
• Adjustable Target Voltage
– MIC5353 LDO regulator controlled by the on-board debugger
– 1.8-5.1V output voltage (limited by USB input voltage)
– 500 mA maximum output current (limited by ambient temperature and output voltage)

图2.PIC18F47Q10 Curiosity Nano评估套件外形图

图3.PIC18F47Q10 Curiosity Nano评估套件电路图(1)

图4.PIC18F47Q10 Curiosity Nano评估套件电路图(2)

图5.PIC18F47Q10 Curiosity Nano评估套件引脚映射图
详情请见:
http://59.80.44.48/ww1.microchip.com/downloads/en/DeviceDoc/PIC18F27-47Q10-Data-Sheet-40002043B.pdf
http://59.80.44.49/ww1.microchip.com/downloads/en/DeviceDoc/PIC18F47Q10-Curiosity-Nano-Hardware-User-Guide-40002103A.pdf
PIC18F47Q10-Curiosity-Nano-Hardware-User-Guide-40002103A.pdf
PIC18F27-47Q10-Data-Sheet-40002043B.pdf

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