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This reference design provides an overview on how toimplement a three-level, three-phase, SiC-basedDC/AC grid-tie inverter stage. A higher switchingfrequency of 50 kHz reduces the size of magnetics forthe filter design and as a result a higher power density.
SiC MOSFETs with switching loss ensures higher DCbus voltages of up to 1000 V and lower switchinglosses with a peak efficiency of 99%. This design isconfigurable to work as a two-level or three-levelinverter.
Modern commercial scale solar inverters are seeing innovation on two fronts, which lead to smaller, higherefficiency products on the market:
1. The move to higher voltage solar arrays
2. Reducing the size of the onboard magnetic
By increasing the voltage to 1000-V or 1500-V DC from the array, the current can be reduced to maintainthe same power levels. This reduction in current results in less copper and smaller power conductingdevices required ..
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