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Maxim MAX5857 16位5.9Gsps RF DAC解决方案

关键词:无线通信 仪器仪表 数字视频 DVB-C2/DVB-T2/DVB-S2X/ISDB-T

时间:2019-06-03 13:13:25       来源:中电网

Maxim公司的MAX5857是高性能内插和调制的16位5.9Gsps RF DAC,能从DC到高达2.6GHz直接合成高达1.2GHz瞬时带宽.器件集成了插值滤波器,数字正交调制器,数控振荡器(NCO),时钟乘法PLL+VCO和14位RF DAC核,其4x线性相位插值滤波器简化了重构滤波器,而增强带通动态性能和降低了FPGA所需要的输入数据带宽,NCO允许输入基带信号的完全敏捷调制,用于直接RF合成,能避开复杂数据路径而直接接入RF DAC核.NCO分辨率亚1Hz,每道高达9.8304Gbps,主要用在DOCSIS 3.1遥控PHY和CCAP,数字视频广播调制器DVB-C2/DVB-T2/DVB-S2X/ISDB-T,Coax线缆以太网PON,点到点无线和仪器仪表.本文介绍了MAX5857主要优势和特性,简化框图和功能框图,时钟子系统框图和评估板MAX5887 EVK主要特性,和VC707系统连接图,电路图,材料清单和PCB设计图.

The MAX5857 high-performance, interpolating and modulating, 16-bit, 5.9Gsps RF DAC can directly synthesize up to 1.2GHz of instantaneous bandwidth from DC to frequencies greater than 2.6GHz. The device is optimized for cable access and digital video broadcast applications and meets spectral emission requirements for a broad set of radio transmitters and modulators including DOCSIS 3.1/3.0, DVB-C2, DVB-T2, DVB-S2X, ISDB-T, and EPoC.

The device integrates interpolation filters, a digital quadrature modulator, a numerically controlled oscillator (NCO), clock multiplying PLL+VCO and a 14-bit RF DAC core. The 4x linear phase interpolation filter simplifies reconstruction filtering, while enhancing passband dynamic performance and reducing the input data bandwidth required from an FPGA. The NCO allows for fully agile modulation of the input baseband signal for direct RF synthesis. The complex data path can be bypassed to access the RF DAC core directly.

The MAX5857 input interface accepts 16-bit input data through a six-lane JESD204B SerDes data input interface that is Subclass-0. The interface can be configured for 3, 4, 5, or 6 lanes and supports data rates up to 9.8304Gbps to optimize the I/O lane count and speed.

The MAX5857 clock input has a flexible interface that accepts a differential sine-wave or square-wave input clock signal up to 5.9GHz. A bypassable clock multiplying PLL and VCO can be used to internally generate the high-frequency sampling clock using a reference frequency between 245.76MHz and 1.475GHz. The device provides a divided reference clock to ensure synchronization between the data source and the DAC.

The integrated RF DAC uses a differential current-steering architecture that includes a differential 50Ω internal termination and can produce a 3.2dBm full-scale output signal level on a 50Ω external load. Operating from 1.0V and 1.8V power supplies, the device consumes 2.7W at 4.9Gsps. The device is offered in a compact 144-pin, 10mm x 10mm, FCCSP package and is specified for the extended industrial temperature range (-40℃ to +85℃).

MAX5857主要优势和特性:

Benefits and Features
Simplifies RF Design and Enables New Communication ArchitecturesEliminates I/Q Imbalance and LO Feedthrough
Enables Multi-Band RF Modulation
Direct RF Synthesis of 1.2GHz Bandwidth5.898Gsps DAC Output Update Rate
High-Performance 14-Bit RF DAC Core
Digital Baseband I/Q with 4x Interpolation
Bypass Path Without Interpolation for Real RF
Digital Quadrature Modulator+NCO for Full Agility
Sub-1Hz NCO Resolution
Integrated Clock Multiplying PLL+VCO
Highly Flexible and Configurable3, 4, 5,or 6-Lane JESD204B Input Data Interface
Subclass-0 Compliant
Up to 9.8304Gbps Per Lane
Divided Reference Clock Output
SPI Interface for Device Configuration

MAX5857应用:

DOCSIS 3.1 Remote PHY and CCAP
Digital Video Broadcast ModulatorsDVB-C2/DVB-T2/DVB-S2X/ISDB-T
Ethernet PON Over Coax (EPoC)
Point-to-Point Wireless
Instrumentation

图1.MAX5857简化框图

图2.MAX5857功能框图

图3.MAX5857典型DAC输出配置图


图4.MAX5857时钟子系统框图

评估板MAX5887 EVK

The MAX5857 evaluation kit (EV Kit) contains a single MAX5857 wideband interpolating and modulating RF digital-to-analog converter (DAC) which can directly synthesize 1.2GHz of instantaneous bandwidth from DC to frequencies greater than 2.6GHz. The MAX5857 EV kit provides a complete system for evaluating MAX5857 performance, as well as developing an FPGA plus DAC transmitter solution.

The MAX5857 accepts input data through a six-lane JESD204B serializer/deserializer (SerDes) interface up to 9.8304Gbps that is Subclass-0 compliant. The MAX5857 EV kit connects to one FMC connector on the Xilinx VC707 evaluation kit, allowing the VC707 to communicate with the MAX5857’s JESD204B serial link interface.

The evaluation kit includes Windows® 7/10-compatible software that provides a simple graphical user interface (GUI) for configuration of all the MAX5857 registers through the SPI interface, control of the VC707 FPGA and temperature monitoring.

评估板MAX5887 EVK主要特性:

Evaluates the MAX5857 RF DAC Performance, Capability, and Feature Set
Single 3.3V Input Voltage Supply
Direct Interface with Xilinx VC707 Data Source Board
Windows 7/10-compatible Software
Optional On-Board SPI Interface Control for the MAX5857
On-Board SMBus TM Interface Control for the MAX6654 Temperature Sensor
Integrated GUI Controls for VC707 Operation
Proven 10-Layer PCB Design
Fully Assembled and Tested

图5.评估板MAX5887 EVK和VC707系统连接图

图6.评估板MAX5887 EVK电路图(1)

图7.评估板MAX5887 EVK电路图(2)

图8.评估板MAX5887 EVK电路图(3)

图9.评估板MAX5887 EVK电路图(4)

图10.评估板MAX5887 EVK电路图(5)

图11.评估板MAX5887 EVK电路图(6)

图12.评估板MAX5887 EVK电路图(7)

图13.评估板MAX5887 EVK电路图(8)

图14.评估板MAX5887 EVK电路图(9)

图15.XFMROUT模块电路图

图16.XFMRCLK模块电路图
评估板MAX5887 EVK材料清单:



DAC输出模块元件清单:



详情请见:
https://datasheets.maximintegrated.com/en/ds/MAX5857.pdf
https://datasheets.maximintegrated.com/en/ds/MAX5857EVKIT.pdf
MAX5857.pdf
MAX5857EVKIT.pdf

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